I want an @ActionRetro -like video channel but using #NetBSD. Not sure if there is an audience for it, but it would be amazing and should allow for some pretty old hardware to run modern software.
Ok, Google couldn't help, so suggestions solicitated!
I use both Icarus Verilog and Verilator for simulation and initialize my rams with
$readmemh(`INIT_MEM, code);
The drawback of this is that the produced simulation binary is tied to the
-DINIT_MEM=prog.hex
value used at compilation time. I would like to reuse the simulation binary on multiple workloads. Is there a way that works for both Icarus and Verilator?
Any recommendation for good small/tiny multimeters/oscilloscopes? I want something I can just keep in my bag always. Bonus points for data connections a la Wifi/BLE/USB (iPhone even).
Using iPhone for display/UI would be ok, but I didn't find much that looked great.
That's probably the most feature-rich core wrt. to all the RISC-V extensions. It's RVA22 + crypto. That includes a humble 128-bit vector, bit manipulation, cache ops, ...)
SPEC2k6Int of ~12. Not a speed demon, but looks to be faster (ST) than any other GENERALLY available #RISCV silicon.
There is (or should be) a humongous overlap between the #retrocomputing / #retrocomputer community and the #tinytapeout crowd. The latter is about making designs that operate inside constraints not too dissimilar to what early computers had to endure. No caches here. Even the register file is a tight fit. However, plenty of room for creativity!
#Python is !@#$; I have to use a script (for work) that someone else wrote. His Python is 3.6, mine 3.10. Result: endless chain of brokenness. I wish everybody would just stop using this garbage.
@nedbat Thanks. I solved it, somehow a dependency of a dependency was pulled in that was broken on 3.10 (Sequence moved). A local, fixed version worked in this case. It doesn't change my point though.
@tommythorn I didn't realize Sequence has moved? Both imports work for me on both versions:
>>> from typing import Sequence
>>> from collections.abc import Sequence
@manpacket@mo8it@tommythorn There is bloat in there, but I think not as terrible as it seems from the plain number of deps.
Rust uses tiny single-purpose crates. So it looks like a lot of deps, but that's often one project as 5-10 components instead of one big lib. Cutting a pizza into more slices doesn't make the pizza bigger. Some crates add almost no code.
It links more stuff statically, using little of libc and POSIX (glibc is 30MB+ of code that C gets for "free").
@manpacket@mo8it@tommythorn 3. It has Unicode, portability layer including native Windows, plugins, sqlite, cryptography, networking with TLS. It does lots of things that bash doesn't. It's not an inherent language bloat. It's the project choosing to have featuritis. The size is not entirely unreasonable for the amount of features in it.
I saw my #ULX3S#FPGA board has a 4-bit 75 ohm composite video out (on the mini Jack) and was curious, so I walked the pattern. Seems an odd discontinuity going from 7 to 8.
@tommythorn This looks like a few tens of mV of offset affecting all non-negative values to me. I can imagine that being caused by input offset in an amplifier, or by a mismatch in one of the MSB resistors if this is a resisor ladder DAC.
@jaseg The resistor values are [in theory] 1100, 549, 270, and 130 ohm respectively, not including the 10 ohm contribution for each from the IO. By my calculations, that should have been a fine ramp, so I'm chalking it up to low accuracy resistors.
ADD: your comment suggests that you think it's centered around 0. It's not. It's 0 -> 3.2 V.