steve, 5 months ago @chandlerc @TomF it’s also pretty common for a design to allow “simple” ALU ops on every pipe and “complex” ops on only a subset, which would also tip the balance (see simple vs complex address generation on some x86 uArches, for example).
@chandlerc @TomF it’s also pretty common for a design to allow “simple” ALU ops on every pipe and “complex” ops on only a subset, which would also tip the balance (see simple vs complex address generation on some x86 uArches, for example).