Welcome to /m/VHDL
Welcome to a VHDL based magazine on kbin. I have left Reddit and will not be voluntarily returning and I wanted a spot where conversations and news might crop up about VHDL....
Welcome to a VHDL based magazine on kbin. I have left Reddit and will not be voluntarily returning and I wanted a spot where conversations and news might crop up about VHDL....
I don't know who all uses Emacs for VHDL but the vhdl-mode major mode is pretty great for the language. Of course, use whatever makes you the most productive. The following is from the vhdl-mode maintainer, Reto Zimmerman....
In the concluding part of this webinar series, we are now ready to apply advanced verification to a complex DUT. From a verification point of view, one of the most error-prone characteristics of complex DUTs is the number of simultaneous activities on multiple interfaces. Unfortunately, there is very little awareness about the...
This is a bit of an introductory post, but I wanted to put some content in the channel. Even on Reddit, the VHDL forum was relatively slow, so depending on migrations and such this might be even slower, but no reason not to try....
This whitepaper https://www.aldec.com/en/company/blog/190--development-of-real-time-sdr-systems-with-aldec-hes describes a method by which the designer can leverage the rapid signal prototyping capability in GNU Radio and use it in co-simulation with Aldec Riviera-PRO....