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pervognsen

@pervognsen@mastodon.social

Performance, compilers, hardware, mathematics, computer science.

I've worked in or adjacent to the video game industry for most of my career.

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regehr, to random
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on a walk with my (like-minded) older son we were talking about logic gates and how a few of them are universal and I was embarrassed to find myself unable to convincingly explain what it is that makes them universal.

I feel like the non-universal gates all have some sort of monotonicity, is this the key concept here?

cc @rygorous @steve

pervognsen,
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@regehr @dev I think you're on the right track in that if you want your generating set to be minimal you want it to have as many "property-breaking" features as possible, in this case non-monotonicity.

seanmiddleditch, to random
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I had to assure my wife that I did not stage this photo and that Khazo (brown cavapoo) was willingly cuddled up with Makalo (basenji puppy) in my office.

pervognsen,
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@seanmiddleditch There's a HoM3 board game?!?

pervognsen, to random
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Somehow I doubt it. Headline: "Microsoft is finally getting its native Windows UI platform act together with WinUI 3 and WPF."

pervognsen,
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@azonenberg I want my hot dog back.

pervognsen,
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@pux0r3 I think almost everyone liked WinForms. It was basically the .NET version of Delphi's UI framework, which was great too.

pervognsen, to random
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Do people still use LTspice as the default free analog circuit simulator? Anything better?

pervognsen,
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@thomask77 Heh, I just looked up a demo video and it still looks like an ancient Windows 95 app (not that I care about that), so it's pretty funny that Windows 11 is required. Not sure why they upped the requirement. :)

pervognsen, to random
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I've never fully worked out how best to articulate my dissatisfaction with the usual way people talk about pluggable allocators in systems programming. Sure, I'd like to have some standard for fallible, pluggable allocation at the lower level of a language's standard library. But the entire mindset of plugging together allocators and data structures is something I find dubious and at best it feels like a poor compromise.

pervognsen, (edited )
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I can appreciate if you're operating in an environment where that compromise is fine for you but I'd like more people to recognize that generic data structures + pluggable allocators are the compromise here, not the other way around. So I always find it a little annoying when people are promoting the approach of explicitly plumbing allocators everywhere as the perfectionist approach. The perfectionist approach is to co-design the components and not treat memory management as a separable concern!

pervognsen,
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@dotstdy It's not even about generic vs non-generic allocation. If I have a subsystem, I can just ask for big chunks of memory from the upstream allocator or just mmap directly and then design my data structures to work with that memory. You don't really need the leaf-level data structures to support pluggable allocators unless you want to take shortcuts by playing LEGO. But like I said, I can appreciate wanting to take compromising shortcuts as much as anyone.

pervognsen,
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@dotstdy There's a reason you don't see so much of this shit in C. When you already have fewer facilities for generic data structures, etc, you don't fall into the trap of thinking that the only problem with generic data structures is that they aren't sufficiently generic (with respect to allocators in this case).

pervognsen,
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@dotstdy So just to reiterate since I might not have made it clear earlier--obviously I have no problem with custom memory allocation methods and use them constantly, I have a problem with trying to parameterize everything by pluggable memory allocators "down to the leaves" since it's a major hit to convenience in cases where I don't care and it's at best a bad compromise in the cases where I do care.

pervognsen,
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@resistor That's definitely the scenario where I've seen a pluggable allocators approach used most successfully.

pervognsen,
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@resistor (More true to what actually happened, we fucked up badly and were ignoring the problem for too long and now we're fighting for scraps any way we can.)

pervognsen,
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@zeux @artificialmind The packed array is classic. Also see csr/csc for sparse matrices which is the same thing: https://en.wikipedia.org/wiki/Sparse_matrix#Compressed_sparse_row_(CSR,_CRS_or_Yale_format)

pervognsen, (edited )
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@zeux @artificialmind BTW, regarding the conclusion mentioning the second-to-last variant (with explicit counts array) when you want to remove things in place, another option is to use tombstone sentinels. That also tends to work better if you need parallelism since swap-erase doesn't really work in parallel without locking. Whereas you can just mark tombstones in place and skip tombstones when processing, cf. hash tables. Also lets you maintain the original order, when that matters.

pervognsen,
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@zeux @artificialmind And of course you can also turn this on its head (either with the counts array or with tombstones) by pre-allocating slack to allow for some amount of in-place growth before you to have to do a local or global rebuild. There's a whole subgenre of data structures based on this idea (packed memory arrays/PMAs).

pervognsen,
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@zeux @artificialmind Definitely depends on the specifics of the situation. I've done this in a case where I was handling the tombstones with branch-free masking via SIMD search. Or in some cases you don't even need to mask them specially, they're just sentinel keys that don't match any real query key, so they're implicitly skipped during the probe search.

pervognsen, (edited ) to random
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I assume this isn't a problem for EEs but for CS types who are taught logic gates, etc, in their curriculum I wonder if timing should be included in a first course. I'm still trying to help the person I mentioned earlier in a private chat and it sounds like that's the source of almost all their confusion. They think logic gates are instant and one of the "counterexamples" they came up for why delays seem logically inconsistent is y = xor(x, not(x)). Which is a standard edge detector.

pervognsen,
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@breakin I wasn't saying you wanted to create latches! I was just talking about them in the context of the usual introduction to digital systems where you start by building latches out of gates. They're asynchronous elements and usually "banned" for a good reason in the design rules for synchronous systems.

pervognsen, (edited )
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@sgf I'm not a teacher so I don't have any basis for saying this but I wonder if trying to use fixed points here would raise more questions than it answers. You define a fixed-point as a solution to an equation. Does the equation always have a solution? (No, consider oscillators.) When it does have a solution, is the solution unique? (No, consider initial conditions.) How do I compute a solution? (Fixed-point iteration.) Is there any meaning to the intermediate iterates? Etc.

pervognsen,
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@sgf I think it's much easier to answer those sorts of questions to the satisfaction of everyone by moving to a delay-based model sooner than later. Which is not to say you can't give an internally consistent account based on fixed points, which you definitely can if you limit the scope.

pervognsen,
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@KingmaYpe Right. Over shorter distances, wire capacitance (and parasitic loading) seems to be the dominant factor even if we're taking into account factors that scale with wire length/distance. At least at the level of detail you usually find in circuit design.

pervognsen, (edited )
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@sgf Opamps are a good example. Although I also have some concerns with the classical pedagogical approach of starting and staying with DC analysis of circuits as the baseline.

pervognsen, (edited )
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@sgf At least it's a lot more justified in analog circuits considering how complex transient analysis can be there. But it probably wouldn't hurt to emphasize dynamic models of circuits and components given how easily accessible SPICE is nowadays and it gives a lot more weight to the fixed-point picture when you see it realized dynamically. And you can appreciate why sticking to DC and AC analysis whenever possible is so attractive.

pervognsen, (edited )
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@sgf Also, I distinctly remember finding my first introduction to opamps extremely mysterious. It's a magic box that drives the voltage difference between the input terminals to zero but only when connected in a negative feedback configuration. And then maybe you have some performance characteristics about slew rate or frequency response, etc. I realize now that's literally how an opamp is defined, more or less, as an abstraction. But it's a lot to swallow if you're an inquisitive student.

pervognsen, (edited )
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@sgf By even saying "drives the voltage difference to zero" rather than "sets the voltage difference to zero [as if by magic]" and mentioning negative feedback, I'm implicitly using a more dynamic view of opamps than how they were introduced to me. :)

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