@lethalbit@chaos.social
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lethalbit

@lethalbit@chaos.social

abyssal witch | deranged catgirl hardware/software engineer + vtuber | that crazy SCSI girl | she/her

#nobot

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lethalbit, to random
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I don't see many KiCad projects with detailed notes in the board files or schematic, which is kinda sad because it's a great way to keep notes for reference and important design descriptions.

My KiCad schematics and board files are absolutely littered with notes, with things from calculations for things to why things are done they way they are.

I wish more people would do it, makes things easier on everyone.

lethalbit,
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@gregdavill Yeah, I find a lot of people really don't use the hierarchical sheets to their full potential, if they even use them at all, they just bump the page size.

I also wish people would stop just smearing global labels over everything,.

I've been thinking about dedicating the root sheet to a block diagram and stuff like that, but I tend to to just interleave that stuff within the schematic pages. but having a dedicated overview page is not a bad idea.

lethalbit, to random
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Has anyone used OpenEMS to calculate trace impedance profiles from a PCB stackup before?

I'm looking around for decent and fast 2d field solvers for that kinda thing but outside of like 4 HUGE and expensive software suites there really isn't anything for the at home catgirl

lethalbit,
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@azonenberg many thanks for the offer. I've got a copy of Sonnet lite sitting around but never managed to get much use out of it,

I should be fine at the moment though~

lethalbit, to random
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Suddenly I have the need to LaTeX math notation rendering in KiCad's eeschema / pcbnew text fields >.>

lethalbit, to random
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Something that probably only I would find useful, but would be nice in KiCad is the ability to assign a nested sheet a schematic symbol, and have the pins match up to the sheet pins.

Would be nice for a few things i'm bapping at.

lethalbit,
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I know that xschem can do it, and I /think/ Cadence Virtuoso can do it, and it's useful there.

Not so much in KiCad normally, but I still have a few things that could use it.

lethalbit, to random
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Unable to focus so I spent a little bit and made some KiCad footprints for the @NGIZero hexagons.

You can find them on github in my KiCad libraries

https://github.com/lethalbit/aki-eda/blob/main/kicad/lib/lethalbit-graphics.pretty/NGI0-Hex.kicad_mod

https://github.com/lethalbit/aki-eda/blob/main/kicad/lib/lethalbit-graphics.pretty/NGI0-Hex-Alt.kicad_mod

lethalbit, to random
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Spiral bound notebooks, like the ones with the big spiral on the top, common in sketch books, is a huge pain in the ass trying to draw all the way to the edge of the paper.

My hand always ends up bumping the spiral and jolting my lines >:(

lethalbit, to random
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wake up babe, nix for lesbians just dropped

lethalbit, to random
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I need me a logic analyzer that has like, 1024 channels,

lethalbit,
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lethalbit, to random
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lethalbit,
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@byteborg that's an IBM 9348-002 9-track magnetic tape drive~

lethalbit, to random
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Dear application developers, please please please stop throwing garbage into ~ we have .cache/.config/.local for a good reason, I don't need your garbage polluting my home directory making things a huge pain, thanks.

lethalbit, to random
@lethalbit@chaos.social avatar

So, it seems like IDC68 for internal SCSI connections was a common thing?

But as far as I can tell only the IDC50 header was ever actually standardized for internal unshielded connections (believe me, I check)

I wonder if they took the existing external HD68 or VHDCI68 pinouts and just used those, i've not checked that bit, but I suspect they did.

lethalbit,
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@philpem I mean it is /kinda/ dsub, but it's still an IDC connector, just with a fine pitch,

Personally i've not seen any such devices but /supposedly/ they showed up on internal CD-ROM and HDD drives.

So maybe it's the same mating connector style but just crimped onto a ribbon cable :v

lethalbit, to random
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I fixed my cohost bot, logicbot to allow for more than one output and also fixed the bug that was causing the netlists to be reduced to pure AOI netlists, so now we have things like muxes, and XOR gates and all that good stuff,

https://cohost.org/logic-bot/post/5748772-w-d-a-b

lethalbit,
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The general gist of how it works is that it randomly picks a number of expressions to generate (1 to 4) then for each expression it randomly picks how many terms it will have.

Once that's done, it generates a LUT with that many columns and fills it out randomly.

The LUT is then converted into Algebraic Normal Form and then either expressly simplified or not.

Once that's done it generates Verilog which is cammed into Yosys with some processing, then the netlist SVG is generated from that.

lethalbit, to random
@lethalbit@chaos.social avatar

Okay okay, so this made Lina grimace when I was joking about it, but.

So, you know how you can't really do a live update into a fully new kernel, because the structure and memory layout changes, but.

What if we first setup a lookaside buffer that we could /serialize/ the internal kernel structures into and write a small replacement stub.

lethalbit,
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You'd then jump to the stub which would replace the old kernel, and then poke the new kernel to deserialize the kernel structures then resume into userspace.

I wouldn't want to actually use that, but I think it would be a funny, and very high effort shitpost.

:v

lethalbit,
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I'm pretty sure that convo ended with "protobuf in kernel", lol

lethalbit,
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lethalbit, to random
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Who doesn't love to wiggle internal bits of things that you really shouldn't be touching :v

lethalbit, to random
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ADHD is currently really kicking my ass, I'm just fidgety and can't focus on anything, and just aaaaaaaaaaa

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