@bread80@mstdn.social avatar

bread80

@bread80@mstdn.social

Amstrad CPC, RC2014, Z80, Raspberry Pi Pico, TTL processors and the occasional bit of Eurorack

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bread80, to random
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With the memory board sent to the fab it's time for the most exciting part of the project: the processor board.

This is A3 sized and houses 117 ICs. I'll be adding as many blinkenlights as I can fit.

I intend to toot as much as I can about the design process. I think it should be ... ahem ... interesting.

But it won't be quick. I'll be fitting it around other projects, and it'll be a ton of work anyway.

bread80, to random
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How’s your Sunday morning going? I’m playing Buckaroo with oscilloscope probes.

If you’ve never used these you have now idea how easily they spring off.

bread80, to random
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Playing with the CPC Modular over breakfast.

Starting with the RAM errors: remember I didn’t have the correct RAM chip? It turns out the RAMA2 line was going to an N/C pin on the subbed RAM chip. That was an annoyingly stupid fail. I’ve patch that signal to a different address line.

Connecting everything back up and still no video.

But … the scope trace is on the sound out. And it’s running a program that plays sounds 🎉🎉🎉

A closeup if the oscilloscope screen. The blue trace shows a rather noisy signal but with a clearly discernible audio frequency signal.

bread80, to random
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Returning to the Z80 ALU core implemented in relays. The first task is to redo the relay symbols. Kicads default generic relay shows the solenoid repelling the contacts, rather than attracting them. It's messing with my head.

In the image I've update the two symbols on the left. The rest are still defaults.

(PS Kicad only has a generic symbol for the single pole relay. I extended this to create the tow and three pole versions).

bread80, to random
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This feels like the appropriate time to mention a project I'm working since it's starting to give useful results.

Code generation for the is tough due to it's quirks. You can load indirect to an 16-bit register LD rp,(nn) but you can only load indirect 8-bit with LD A,(nn). However you can load register indirect to any* 8-bit register with LD r,(HL).

So 8-bit loads end up with:
LD A,(nn)
LD B,A
or
LD HL,nn
LD B,(HL)

🧵 1/n

bread80, to random
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With Eben Upton hinting at a successor to the RP2040 I’m really hoping for 5v tolerant pins. I’m currently leery of designing stuff with level shifters on the basis that the new chip might obsolete the design.

bread80, (edited ) to random
@bread80@mstdn.social avatar

What is your preferred choice of backplane connector for a modular 8-bit computer?

Do you have a preference on price, useability, durability, ease of module design?

Is there any difference from an electrical perspective (signal integrity)?

I'm thinking of maximum signal frequencies below 20MHz.

Boosts appreciated.

bread80, to random
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I was aiming to get the to the fab before Christmas, but I've been distracted by other projects the last week or two.

But the keyboard is now fully updated:

  • Connectors changed to IDC headers for convenience.
  • New connector added for the Modular, using a '6128 pinout. At the back of the PCB for better cable routing.
  • Larger legend which may make it practical to use cheaper switches.
  • Locating lugs added to switch footprints for easier assembly.
bread80, to random
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“Use our online chat support. We’ll reply when we get around to it. Could be ten minutes, could be thirty minutes :shrug:. If you so much as blink we’ll terminate the session and you’ll have to go back to the beginning and start all over again.”

PS never use Bluehost. Regretted it the moment I set up the account.

bread80, to random
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Almost all the code generation is table driven. Inc and Dec are one of the exceptions that require code. In this case it's a loop to generate the INC or DEC instructions.

Only thing left to do is to generate add or subtract if the offset is too large. For now I'm stabbing at doing this for offset greater than four. Optimising here is much more complex than it might seem. For example you can INC any register whereas ADD requires A.

bread80, to random
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RIP Z80 🥲

End of life notification letter:
https://www.mouser.com/PCN/Littelfuse_PCN_Z84C00.pdf

bread80, to random
@bread80@mstdn.social avatar

I’m secretly happy about the Sonos app-pocalyse. It’s given me the kick I needed to finally ditch it and move to something (hopefully) better.

bread80, to random
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That’s what I call a good start to the weekend 🙂🙂🙂

The only soldering error was a short between power and ground on the USB power connector.

Design wise the backplane has a couple of footprint issues, and my attempt to keep the board smaller by placing components under and between the cards is proving less than ideal in practice. The taller components are actually fitting between the cards but it looks messy and there’s potential for damage from soldered pins.

Top 3/4 view of the computer showing the vertically mounted cards. One board has a row of green LEDs lit at various brightnesses.
Side view of tue computer with video out and other connections.
Top down view.

bread80, to random
@bread80@mstdn.social avatar

This feels like a good time to look at what is needed to start the 2200 processor.

The Datapoint has no ROM, not even a boot ROM. On reset it rewinds tape deck 1, loads the first file, and executes it. All of this is done in hardware.

🧵

bread80, to random
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Before Christmas I decided the needed two big refactorings. The first is nearly done: the data tables for operands and primitives.

The OG version had grown confusing due to some poor initial decisions. It also put too much intelligence into the parser regarding the available types for each operator.

The new version allows the parser to scan the table to confirm if an operator can handle the operator types. It can also 'expand' types to find a match...

bread80, to random
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WTF is Chrome forcing me to agree to here? If I turn it on does that mean it shares data? Or does turning it on allow be to stop it sharing data if I remember to go in and change the settings?

bread80, to random
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I apologise for not posting this earlier.

is now alive! (At least Conway's variant of alive). The initial version was slow - about four seconds per generation. It was multiplying coordinates for each cell read and write.

The second variant uses offsets into each liner buffer, and only redraws changed cells. It's now running at three to four generations per second.

The next generation of the glider.

bread80, to random
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I just uninstalled YouTube from the telly. They gave me the Christmas gift of 40 seconds of unskippable ads every seven minutes (I timed it).

I’ve been using it as ‘entertainment’ and spending far too long staring at it. I figure I’d rather read a book. Or get up and do something productive.

bread80, to random
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I’m taking a Quick Look at what a hypothetical next gen RP2040 would mean for the . The current design uses two RP2040s, which then requires two ROMs, crystals, connectors etc.

A chip with about 40 GPIOs and another PIO or two would enable me to use a single chip.

5v tolerant pins would enable me to drop at between two and four glue chips.

That would make the project significantly easier to fit into a DIP40 package.

bread80, to random
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I been getting a bit obsessed with software projects recently. So I'm going to switch and progress some hardware projects.

I've finished the basic reworking of modules for the - which is mostly to verify the connector pinouts make sense.

I'm now starting on the backplane. I've done a quick test that routing the sockets won't cause any problems. I'd prefer to centre the sockets, but offsetting them gives room for power circuitry while board size down.

bread80, to random
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Finally arrived. After celebrating a little too long and hard over Chinese new year.

bread80, to random
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Interesting bug Thursday.

The date picker in Quickbooks online has some lovely keyboard shortcuts. Use W or K for the first or last day of the week, as in WeeK. The same for MontH and YeaR.

But this month H moves to the 30th March instead of the 31st. I wonder if it's a leap year bug? But the rest of this year works properly, as does March 2028.

bread80, to random
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Todays test program: load values into the A and B registers, add (or subtract) them and loop.

I've got the jump working but the ALU ops are not so pretty. It's inverting each bit of A if the bit in B is set. The circuit for the ALU is all standard gates, and I'd be surprised if there's any bugs in there given the rest of the simulator is working so well.

So it's probably a schematic issue, and one which will take a bit of debugging.

bread80, to random
@bread80@mstdn.social avatar

I/O on the 2200 (as I'm understanding it) :

The instructions are similar to the i8008. Bits 4 to 1 of the bytecode code the I/O port. 32 addresses, but the first 8 are inputs, mapped to instructions IN 0..7. The remaining 24 are outputs mapped to instructions OUT 0..23.

The Datapoint uses the instruction EX for outputs (short for external IIRC)). Rather than port numbers it uses names. The first 8 are generic:
EX ADR
EX STATUS
EX DATA
EX WRITE
EX COM1 though EX COM4
🧵

bread80, to random
@bread80@mstdn.social avatar

The processor board is large, expensive, and will take a long time to solder up. It could have errors from my transcribing the schematics or the schematics themselves. It may even have deliberate traps to stop competitors stealing the design.

I really need a way to prove the design works. I could use Logisim for that. But re-entering the whole thing would take ages, and have issues of it's own (and assuming it could cope with the design).

1/n

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