riscv

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wiki_me, in Milk-V Meles RISC-V single-board computer is now available for $80

might be worth mentioning the c910 core this SBC is based is open source.

davel, (edited ) in Milk-V Meles RISC-V single-board computer is now available for $80
@davel@lemmy.ml avatar

Two of my internet filters block fave.co, so FYI for anyone else: arace.tech/products/milk-v-meles-1


<span style="color:#323232;">$ curl -sLI https://fave.co/3yIb2nx </span><span style="font-weight:bold;color:#a71d5d;">| </span><span style="color:#323232;">grep </span><span style="color:#183691;">'^location:'
</span><span style="color:#323232;">location: https://go.skimresources.com/</span><span style="font-weight:bold;color:#a71d5d;">?</span><span style="color:#323232;">id=32X105</span><span style="font-weight:bold;color:#a71d5d;">&</span><span style="color:#323232;">xs</span><span style="font-weight:bold;color:#a71d5d;">=</span><span style="color:#183691;">1&xcreo=500002&url=https://arace.tech/products/milk-v-meles-1
</span><span style="color:#323232;">location: https://arace.tech/products/milk-v-meles-1
</span>

Edit to add: The “Mars” is on sale for $69.

merthyr1831, in RISC-V Performance On Ubuntu 24.04 LTS With Scaleway's EM-RV1

16GB DDR5 sounds pretty overkill for the performance envelope of these RISC boards. But still exciting to see more RV products for devs to use!

wiki_me, in Open Source RISC-V projects

xiangshan , rocket chip , cva6 , ibex .

All of these are built by non profits (although some of them are more like “trade groups” and not “charities”).

xiangshan is probably the most interesting, there is also vroom but it seems inactive for now.

CommieCretzl, in Open Source RISC-V projects
@CommieCretzl@hexbear.net avatar

Why is RISC-V important over other architectures? I’m new to the scene but I just finished a class on programming RISC-V assembly.

I just want to know what all the buzz is about for what seems to be an already crowded field

fubarx,

For the longest time, if you needed a CPU, your choices were basically IBM, Intel, DEC, or Motorola (ignoring small, embedded systems). Then some academic papers came out on the value of a ‘reduced’ instruction set. That led to Sun SPARC, IBM POWER, MIPS, PowerPC (and a few other) processors, most of which eventually disappeared.

Another group called ARM came along and offered not just an alternate reduced instruction set, but also the baseline code needed to implement all that. This way, you could cobble together your own CPU for exactly what features you needed (memory, disk, networking, GPU, etc). Having a baseline sped up development a lot, but you had to license that stack and pay ARM royalties.

That hummed along quietly until Apple and NVidia decided to create their own ARM-based chips. All of a sudden, ARM became known as a beefy, power-efficient option for phones, desktops, laptops, and servers.

In 2010, a bunch of academics dusted off the old RISC papers and came up with RISC-V. Companies were started to follow the same model as ARM: modules you could cobble together to make a custom processor. Except all of it was open-source and you didn’t have to pay the ARM license fee.

AI/ML processors are now the new thing. The big race is between Intel, ARM-based processors, and RISC backers to see who can come up with integrated, power-efficient AI processing features and quickly roll them out to customers. That world is divided between beefy processors used for training in data centers, and small, efficient ones used for running inference at the edge (ie phones, cars, gateways, etc).

We are now in the early stages of this period.

breadsmasher, in Open Source RISC-V projects
@breadsmasher@lemmy.world avatar

I guess just making sure my understanding aligns - RISC V being the instruction set, and you are wondering if anyone is building a CPU to implement it?

Came across a couple examples, if that’s what you mean

Hardware

arstechnica.com/…/sifives-brand-new-p550-is-one-o…

www.sifive.com/technology/risc-v

riscv.org/…/x-silicon-announces-a-new-low-power-o…

Cloud

nextplatform.com/…/the-first-risc-v-shot-across-t…

aws.amazon.com/ec2/graviton/

riscv.org/…/scaleway-launches-its-risc-v-servers-…

labs.scaleway.com/en/em-rv1/

JayDee,

That’s correct. I’m interested in seeing hardware implementations of it.

breadsmasher,
@breadsmasher@lemmy.world avatar

I know LTT has a bit of a bad wrap these days. But he had a video on RISC V a while ago, in a desktop computer youtu.be/vaMxTSm53UU?feature=shared

merthyr1831,

I’d recommend the Explaining Computers videos on RV over LTT, especially since the guy at EC does a lot more research into RISC-V, and does yearly “state of RISC-V” videos.

www.youtube.com/watch?v=f6mPK3QCrBo

breadsmasher,
@breadsmasher@lemmy.world avatar

Thanks for the recommendation!

groche, in Banana Pi BPI-F3: Single-board computer and RISV-V alternative to the Raspberry Pi now available

With 8 or 16 GB of ram it would have been the best risc-v board excluding the milk-v pioneer

Veraxus,

Yeah. The 2-4GB limits, especially given the price, are really disappointing.

RobotToaster, in Chinese Startup Unveils The First RISC-V Based AI CPU, Powers The K1 Domestic Laptop
@RobotToaster@mander.xyz avatar

I expected it to not be available to consumers yet, but you can buy a Banana Pi BPI-F3 with it on aliexpress.

davel, (edited ) in Google pulls RISC-V support from generic Android kernel
@davel@lemmy.ml avatar

I guess Alphabet wants to help Huawei accelerate its migration to HarmonyOS.

nf3rn0, in Can someone explain to me the brief process used to create the meta-pine64 minimal image here?

This layer looks kinda dated and not maintained. Have you tried building meta-riscv? I have had success building a custom image for the visionfive 2 using the meta-riscv layer. (Same SOC as the pine64) I would start off with just the minimal core image. Not sure if you’re are looking for graphic support, I was only interested in a headless configuration.

MigratingtoLemmy,

I’m interested in a headless configuration too. I realise that CPU support might already have been mainlined, whilst GPU support is still pending.

BrikoX, in US government reportedly ponders crimping China's use of RISC-V
@BrikoX@lemmy.zip avatar

<…> the representatives wrote in a November 2023 letter that called for creation of a “robust ecosystem for open source collaboration among the US and our allies while ensuring the PRC is unable to benefit from that work.”

That’s not how open source works you fucking moron.

eleitl,

If they change the terms of the RISC-V license to include sanctions blacklisting it would just encourage forking and guaranteeing failure of the restricted license in the long term.

merthyr1831,

I mean this is why RISC-V intl. moved to Switzerland, because no one wanted to adopt a US-controlled ISA that they’d arbitrarily cut access to if you didnt align to their geopolitics.

I don’t know if the US has any power to restrict RISC-V in China, but if it does then RISC-V dies almost immediately after in terms of its potential to supplant ARM and X86

RobotToaster,
@RobotToaster@mander.xyz avatar

That’s not how open source works you fucking moron.

Maybe they’ll go the Bush route and call their new license “freedom source”.

Or pass a law mandating their new definition of open source.

kristoff, (edited )

That is valid … in peace-time when everybody accepts that.

The problem is that the reality is a lot complex. Open source only exists, because of the open source licenses. The open source licenses are only valid, because of the copyright legislation. That legislation is only valid, … because the nation-state has determined it is valid.

Consider a scenario where a nation-state (whatever state that may be, just making a general starement here) decides that for sectors it conciders critical for the state, it -or companies that act on its behalve- are allowrd to use / copy / enclose whatever open source technology they want without being subject to the requirements that come with the opensource license. So they can use whatever open source technology they want but they do not have to return anything to it. They can even use it in closed products.

How do you propose to handle such a scenario?

Kr.

BrikoX, (edited )
@BrikoX@lemmy.zip avatar

That is an interesting scenario. And of course nobody can prevent abuse of open source projects if legal institutions are abolished or held at metaphorical gunpoint, but even in that case the actual open technology would be still open to others. It would just limit the contributors that contribute back to the project. If x country hard forks the existing project, ignores the license, stops contributing back and starts working on it solo, it would get isolated pretty fast. Nobody wants to do business in a country that offers no legal protections. We even have a recent example of that happening. Russia nationalized a few international businesses and as a result many companies just pull out of the country. Yandex (who was owned by Dutch mega-company), sold out to Russia for half of what they were worth since the risk to keep operating was too high.

Open source license abuse is nothing new, big companies do that all the time since small volunteer contributors doesn’t have the capital to force compliance.

someguy3, in Imagination licenses RISC-V CPU cores for smart TVs, IoT, embedded stuff

Isn’t that the target market for risc-v?

merthyr1831,

Yup, and the performance envelope is around the ARM A53 which is on par with a Raspberry Pi 3b.

eugenia, in Chinese schools testing 10,000 locally made RISC-V-ish PCs
@eugenia@lemmy.ml avatar

Creating an open HW and open SW based on Risc-V and linux/bsd/android (whatever) is what the EU should have done for its citizens. But instead of creating something, they only know how to alienate companies. And I don’t mean american companies, but also european ones.

IHATESMOKINGCHRONIC, in Chinese schools testing 10,000 locally made RISC-V-ish PCs

pog

janNatan, in Chinese schools testing 10,000 locally made RISC-V-ish PCs

Fascinating. Anybody who just wants to know why they called it “RiscV-ish,” apparently there’s some MIPS thrown in as well.

IHATESMOKINGCHRONIC,

what does that mean i only understand coding horrible applications, websites, and minetest and minecraft

silent_water,

they extended one set of assembly instructions with a bit of another. instruction sets are determined by the hardware and are called the architecture. RISCV is an extensible architecture meaning you can add in additional instructions without breaking compatibility with programs targeting the architecture.

IHATESMOKINGCHRONIC,

I know as much as that and that intel has like a giant black box and gatekeeps giving people instructions (and prevents people from being able to fix their fuck ups, backdoors etc)

silent_water,

the x86 instruction set is public. implementing it breaks copyright law, if you aren’t AMD or Intel. it has to be public or compilers/interpreters/assembly code couldn’t exist.

IHATESMOKINGCHRONIC,

isn’t the main backdoor now like a separate chip that acts as a sort of hypervisor thingy?

silent_water,

no, it’s not a hypervisor. it’s a a bit of hardware with access to the network stack that allows firmware updates and monitoring (in the “is the computer on/overheating” sense - it gives access to the low level sensors). it’s supposed to be disabled if you don’t pay money to turn it on (ie enterprise customers) but there’s no way to really know because the motherboard chipsets don’t expose access to it. it /shouldn’t/ be able to function because the motherboard needs to cooperate in order to make it function but we don’t really know what the chipsets/bios do/don’t implement. so it’s a theoretical attack vector by the USG.

the AMD version of the same is much more limited and doesn’t even exist on consumer chips, if you don’t buy workstation or server hardware. and if you do buy those, the motherboard exposes the control functions with documentation on which network interfaces it’s able to use. it’s also frequently open spec these days so you can run your own FOSS management firmware. very handy if you e.g. need to access the bios when the video card won’t turn on or your overclock is busto.

Intel is basically just stupid and too lazy to only include the extra silicon in chips where it’s actually possible to use it. and too greedy to open up the specs to make it possible to control it yourself on chips where it can be used. don’t give Intel money. AMD appears to be all in on open source specs and actively contributes to the open firmware/open source bios initiatives so it’s likely that it will become standard on their hardware over the next 5ish years (their code sucks ass so it’s very hard for projects to merge/debug quickly so it’s a slow effort lol).

IHATESMOKINGCHRONIC,

I guess I wasn’t thinking about the bottom line enough, maybe a remnant of my pure FOSS ideology devoid of political consciousness

IHATESMOKINGCHRONIC,

Thanks for clarifying that, it sounded insanely impractical

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