Slingshot (Gyurco) has updated several arcade cores from Gehstock's respository, now with screen rotation option, so you can enjoy them with any monitor even it can't rotate :ablobcatenjoy:
@mistboard I got me a Vampire V4+ Standalone for like ~700 EUR last year and entirely regret it (ApolloOS/AROS is surprisingly bad and unreliable). I believe none of the cores really work (frequent disk I/O problems) and USB support is terrible.
How does the SiDi 128 differ from what Apollo is trying to do with the Vampire?
Also, SNES cores sounds cool, the Vampire literally only is a wonky Amiga. (worse than the MiSTs I saw, IMHO, and worse than the sum of its parts for my use case)
#fpga anybody in the FPGA fediverse have any experience with the CologneChip GateMate dev board? Being able to configure logic blocks as 8-bit LUTs, 2-bit full-adder or 2x2-bit multiplier seems advantageous for my application.
For a long time, i've been waiting for this fpga-based platform. Finally, i got a #GlasgowExplorer thanks @1bitsquared for your effort. Time to learn Amaranth-hdl in detail. Many projects in mind! #FPGA
@WillFlux The thing is, the KU+s are much bigger, more expensive, and more logic heavy. Which makes using them as a simple "SERDES -> DRAM buffer" bridge block an impractical proposition.
The smallest one they make in a 1156-ball package is the KU11P which is enormous: 32 GTHs and 20 GTYs (although not all pinned out in the 1156 ball package) and nearly 300K LUTs, 80 UltraRAM, 600 block RAM, almost 3000 DSPs.
Compare this to Kintex UltraScale, where the KU035 is available in FFVA1156 with 416 HPIOs and 16 GTHs but is only 203K LUTs.
The SU150/200P have lots of IO but it's almost all HD (336 HDIOs, 104 HPIO, 132 XP5IO for the new memory controller). It does help that the new memory controller can do 4266 Mbps vs 2400/2666 for the rest of the product line.
It wouldn't surprise me if we saw a new AU+ die with that new RAM controller added... that would be a huge improvement for my use cases.
Hey there #FPGA hackers! If you want to do open source FPGA development on #NetBSD, now you can! I've just made pkgsrc packages for YosysHQ's icestorm, nextpnr-ice40, and yosys.
Yesterday we released the first numbered version of Surfer, an extensible waveform viewer that runs everywhere 🎉
The big new thing for 0.1.0 is a brand new waveform library written by @ekiwi which supports FSTs, and is much more efficient at handling VCDs than the previous lib. Startup time on a 7GB vcd went from 2 minutes to 6 seconds on my machine 🔥
@SirTapTap You know, it's funny, but I've had the same problems with the Shining Force games when I put them on my 3DS. I'm wondering if they do some funky stuff with the hardware that isn't compatible with save states or suspending (or at least not easily compatible.) I'm wondering if it's not so much a FPGA issue as just no one ever got around to figuring out a game-specific fix.
@SMNFXCN Oh that's neat. A few years ago I finally played Pokemon TCG GBC 2. No idea why it wasn't localized but it was fan translated years ago and it's quite good!
I bet you have an #FPGA board in a drawer somewhere. Why not show it some love for #FPGAFriday? I'm dusting off my #RadionaOrg ULX3S and porting a graphics design with the @yosyshq open-source toolchain.
The great news is that the economics really add up: For a run of five boards one costs only about $22 assembled (w/o headers). Add an A100T core for $70 and you are below $100 shipped, while having the functionality of most of the MiSTer IO board (which alone costs $70) and an FPGA capacity comparable to the MiSTer.
Or even, use a $99 Kintex 325T board, and you have an FPGA console for $120 with more than twice the capacity of the MiSTer, and almost half the price!
Hi fediverse, I have a question about #HDMI and licensing.
In my free (GPL) zeST project I'm using video and audio output, and it turns out the #FPGA boards I'm using have a HDMI video/audio output connector.
One one board (Z-Turn) HDMI is managed by an on-board HDMI transmitter chip, and on the other board (Z7-Lite) the HDMI output is produced by FPGA logic I designed.
Should I be concerned with HDMI licensing? Considered I'm not selling any hardware, just using the hardware I bought.
2/ All the effects are in this repo, with links to run them in the browser. On #fpga most can race the beam, with multiple cycles per pixels or as pipelines.
3/ I'll keep adding to the collection as well as commenting some of the most mysterious effects, even though part of the fun is figuring out how they work!
The AMD/Xilinx #FPGA software development environment has moved from Eclipse to VSCode(?) since latest 2023.2 release. Some functionalities have been (temporarily?) removed, like the device tree creation.
I Updated the zeST documentation accordingly; no need to run the graphical IDE anymore to build zeST, everything now goes through the command line!
