mei,
@mei@donotsta.re avatar

@whitequark that does sound relevant. I'm definitely exhausted and sometimes people tell me I'm disabled but I mostly brush it off and pretend I'm fine and normal

what's the trade-off? can I use it to develop bitstreams for all/most FPGAs? (maybe with some compatibility step like transpiling through Verilog?) can I interact with hard IP?

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