@cr1901@mastodon.social avatar

cr1901

@cr1901@mastodon.social

Another important fact about me is that I collect ISA cards. I still don't believe in magic- just concepts I don't understand yet.

http://pronoun.is/he/him

This profile is from a federated server and may be incomplete. Browse more on the original instance.

foone, to random
@foone@digipres.club avatar

Don't you hate having to tell your keyboard what CPU your computer uses?

cr1901,
@cr1901@mastodon.social avatar

@foone Fortunately, ppl have made converters that are open source with parts readily available :D

coughs violently

https://github.com/cr1901/AT2XT

fasterthanlime, to random
@fasterthanlime@hachyderm.io avatar

YES, zig should 100% divorce LLVM ✨

https://youtu.be/m0IWOrZqewg

cr1901,
@cr1901@mastodon.social avatar

@fasterthanlime Cosigned. Yes, for selfish reasons, but cosigned all the same.

fasterthanlime, to random
@fasterthanlime@hachyderm.io avatar

btw, if it divorces LLVM, zig would suddenly become actually interesting to me. it would probably make a lot of people angry but yolo.

https://github.com/ziglang/zig/issues/16270

cr1901,
@cr1901@mastodon.social avatar

@fasterthanlime Angry? I'd be f***ing ecstatic.

At some point I need to learn Rust MIR to target "the old stuff I care about that doesn't have a lot of registers".

>that LLVM would never even dream of, for example MOS .

Also, LLVM 6502 does exist, it does work, and it has interesting ideas relying on GlobalISel: https://llvm-mos.org/wiki/Welcome

I'd still love to see more work on optimizing for reg-poor archs, besides "simulate a register machine" (LLVM WASM has a stackify pass).

azonenberg, to random
@azonenberg@ioc.exchange avatar

FPGA folks: how often do you floorplan designs?

I find myself doing it all the time, often as soon as IOs are constrained. It's helpful to think about what logic is going where, what's close vs long range, how much ram vs logic a given subsystem is using, etc.

cr1901,
@cr1901@mastodon.social avatar

@azonenberg Nice to look at, but I don't find it that useful. I'm not exactly pushing out GBs of data through an FPGA tho.

mcc, to random
@mcc@mastodon.social avatar

Thanks 1138

cr1901,
@cr1901@mastodon.social avatar

@mcc "Andi, we're gonna have company!!"

mcc, to random
@mcc@mastodon.social avatar

On Cat YouTube there's a video with 3 million views titled "Reacting to nothing at all" in which the vlogger cat is sitting in an empty room abruptly looking left and right at seemingly random moments

cr1901,
@cr1901@mastodon.social avatar

@mcc Sounds like a great cat :D!

mcc, to random
@mcc@mastodon.social avatar

A thing I don't think I really like about recent anime is a thing where they almost all seem to have an emotional memories-of-things-that-happened-in-the-show-up-to-now montage in the final episode but the show is like 12 episodes long so it feels kinda unearned

cr1901,
@cr1901@mastodon.social avatar

@mcc I started watching an anime in late-2020, right? I got through half the first episode before putting it aside, until ~2 weeks ago. Yea, high latency.

They killed off > half the cast in the first episode. Uhhh... glad I didn't get attached to any of them.

(Series is 1980s SPT Layzner)

azonenberg, to random
@azonenberg@ioc.exchange avatar

Anyone have a good, easy to understand reference describing the theory and practice of SEC-DED memory error correction codes in sufficient detail to implement it?

I've seen lots of documents with high level introductions missing key details, and lots of dense mathematical stuff full of matrix multiplication and polynomials and things that don't obviously map to something you can easily implement.

As far as I can tell the commonly used (72, 64) code consists of a (71, 64) Hamming ECC that provides single error correction only, and an extra parity bit for double error detection (this detail was not clearly explained until I found it in a 15+ year old Xilinx app note).

cr1901,
@cr1901@mastodon.social avatar

@azonenberg I made a high-level thread about Hamming (7,4) a while back. I think I mainly used Wikipedia articles to construct it tho: https://twitter.com/cr1901/status/1385730725656371206

Richard Hamming himself probably did a lecture or two on it when he was alive. He was big into accessible science AIUI.

trixter, to animals
@trixter@retro.pizza avatar

So wow, Happy to me!

The rescue I foster for did a big adoption event today at the local PetSmart, and we had a few people who had gotten their applications approved early and just needed to meet the kittens and decide which one to take home... and all three of my remaining L-litter babies were adopted! I'm ALL OUT OF BABIES!* 😭

*already have another litter lined up later this week

cr1901,
@cr1901@mastodon.social avatar

@trixter I love the hissing tuxedo kitty. Plz 2 give pets and treats for me :D!

fasterthanlime, to random French
@fasterthanlime@hachyderm.io avatar

So apparently you cannot online-shrink an ext4 partition, and the procedure to follow is still "umount, fsck, resize, DELETE AND RECREATE through fdisk or parted, reload partition table, remount" which is absolutely bonkers but sure enough it did work

cr1901,
@cr1901@mastodon.social avatar

@fasterthanlime I think partition info is redundant/separate from file system info.

For instance, my NAS drive has a partition table which claims "NTFS", but it's actually EXT4.

Guess who forgot to update the partition table when he reformatted :P? And I dare not f*** with it now :D!

gsuberland, to random
@gsuberland@chaos.social avatar
cr1901,
@cr1901@mastodon.social avatar

@gsuberland The preview ends at "Therefore A Billionaire Must Never".

Which is also good :D!

azonenberg, to random
@azonenberg@ioc.exchange avatar

Is anyone aware of any artwork (periodic table symbol, fictional macroscale sample, etc) depicting "Lennard-Jonesium" as if it were a real element?

Presumably it would have element abbreviation Lj and atomic number 126.

cr1901,
@cr1901@mastodon.social avatar

@azonenberg > Looks up Lennard-Jones

I really should reread my chemistry textbook...

brion, to random

If I understand correctly, the reason we have common 29.97 and 59.94 frame rates is that when engineers updated the NTSC spec for color, the color signal and the FM audio carrier could produce stable interference patterns in each other due to the ratio of frequencies.

They couldn't change the audio carrier frequency without breaking compatibility with old B&W television sets, but the tolerances for synchronizing the video signal were wider and stretching from 30 fps to 30000/1001 fps fixed it

cr1901,
@cr1901@mastodon.social avatar

@brouhaha @brion

So "They couldn't change the audio carrier frequency without breaking compatibility with old B&W television sets" isn't correct?

(I thought that was true myself)

cr1901,
@cr1901@mastodon.social avatar

@brouhaha @brion Yes, but would humans notice a 0.1% change in carrier?

Analogous to how if you tune to suppressed carrier AM or FM on an amateur radio, the voice will sound off/odd if your tuning frequency doesn't match the actual input carrier frequency well.

(Which reminds me: why don't I typically hear this happen on AM/FM radio receivers? Is it because analog dials are a thing of the past?)

cr1901,
@cr1901@mastodon.social avatar

@ChartreuseK @brouhaha @brion Wait... AM as in "AM Radio" is classic AM where the carrier is sent?

That's horrifically inefficient (33% of power is used for the message with sine wave carrier)!

cr1901,
@cr1901@mastodon.social avatar

@ChartreuseK @brouhaha @brion Yes, it is indeed easy to receive.

You can do it without a battery if you use a special type of earpiece:

https://www.youtube.com/watch?v=0-PParSmwtE

(Yes, I'm sure you already know this. Am linking this for future-me.)

But it is inefficient, so I figured it would've been banned for it's inefficiency by now lol

krzyzanowskim, to random
@krzyzanowskim@mastodon.social avatar

That is one of the wildest stories I've read recently about programming languages.

A C lexer in 200b is something that didn't even cross my mind.

https://xorvoid.com/sectorc.html

cr1901,
@cr1901@mastodon.social avatar

@krzyzanowskim @fasterthanlime Impressive. It even barely punts to the BIOS for anything. It uses the serial port for input instead of the keyboard (the latter of which is at least several hundred bytes of BIOS code, even in the original IBM PC) :D

https://github.com/xorvoid/sectorc/blob/main/sectorc.s#L385

foone, to random
@foone@digipres.club avatar

struct ClipPlane{
float fNear;
float fFar;
};

struct CelinePlane{
float fNear;
float fFar;
float fWhereverYouAre;
};

cr1901,
@cr1901@mastodon.social avatar

@gsuberland @foone Sounds like Neuro-Sama :D!

... err, nevermind...

gsuberland, to random
@gsuberland@chaos.social avatar

me: I wonder if anyone ever got Linux booting on the Xtensa architecture ESP32 modules rather than just the RISC-V ones

hackaday: yes, but not in the way you were expecting

https://hackaday.com/2022/07/14/its-linux-on-an-esp32/

cr1901,
@cr1901@mastodon.social avatar

@gsuberland Yea the emulation angle doesn't excite me. AFAIK, it was done without emulation recently: https://mastodon.social/@projectgus@aus.social/110381289240535503

cr1901,
@cr1901@mastodon.social avatar

@gsuberland Well that's immensely less fun :(...

That reminds me, I'm still waiting for someone to figure out how to use the LP RISCV core on the BL808...

gsuberland, to random
@gsuberland@chaos.social avatar

TIL about resonant clock distribution in high speed ASICs. If you've got a clock signal that needs to be distributed across a certain distance, you need to overcome the parasitic impedance of the channel. That usually means having multiple inverters/buffers along the way. However, each buffer introduces jitter, which causes ISI. If you only wish to operate the clock at a specific frequency, you can instead use resonant LC circuits tuned to the clock frequency to propagate the clock.

cr1901,
@cr1901@mastodon.social avatar

@gsuberland

  1. Why does jitter cause ISI? I thought ISI was an additive/linear noise thing for channels w/ more than 2 voltage levels which store values.

  2. And how, pray tell, do you keep all these LC circuits in phase with each other (A "classic" PLL can only track two inputs- one LC circuit out of many and its VCO)?

cr1901,
@cr1901@mastodon.social avatar

@gsuberland Fair, without synchronization, it's not like you're screwed (we have clock-domain-crossings for a reason). It's just a handshaking PITA :P.

>jitter causes ISI because it results in a FIR style impulse response.

Can you elaborate/provide something I can read?

IIRC, an FIR impulse response is "a bunch of lobes across the spectrum w/ a number of frequencies w/ amplitude -inf dB" and "linear phase". I thought jitter was a nonlinear effect.

cr1901,
@cr1901@mastodon.social avatar

@gsuberland Okay, the convolution explanation makes much more sense.

It also reminds me of something I read on Wikipedia a few months ago about "why does sinusoidal distortion produce harmonics":

https://twitter.com/cr1901/status/1607857929264455680

mattblaze, to random
@mattblaze@federate.social avatar

Apparently someone is threatening to have the instance I’m on defederated if they don’t get rid of me, because I posted that the Mastodon DM system is dangerously broken and non-intuitive.

So, if either of those things happen, it was nice knowing you all. (Well, some of you all, anyway.)

cr1901,
@cr1901@mastodon.social avatar

@mattblaze @littletranspunk Really not cool to deliberately boost a reply to 26,000 ppl who follow you.

You know damn well that people who agree with everything you say in this thread will use that as a signal to harass.

niconiconi, to random

Silicon bugs be like... The worst-case scenario is when the datasheet is public but the chip bug errata is only explained in an NDAed document.

cr1901,
@cr1901@mastodon.social avatar

@niconiconi @koz The most recent revision of the 6551 UART transceiver has a "feature" according to the datasheet, where the "TX buffer empty" bit is always on. This means that it's constantly triggering interrupts.

According to ppl familiar w/ the issue on 65xx forums, what actually happened was "there was a bug in the software used to simulate the silicon level design that missed a short", and the bug wasn't caught until it was too late.

I wish the datasheet was more honest.

  • All
  • Subscribed
  • Moderated
  • Favorites
  • •
  • JUstTest
  • kavyap
  • DreamBathrooms
  • InstantRegret
  • magazineikmin
  • osvaldo12
  • mdbf
  • Youngstown
  • cisconetworking
  • slotface
  • rosin
  • thenastyranch
  • ngwrru68w68
  • khanakhh
  • megavids
  • ethstaker
  • tacticalgear
  • modclub
  • cubers
  • Leos
  • everett
  • GTA5RPClips
  • Durango
  • anitta
  • normalnudes
  • provamag3
  • tester
  • lostlight
  • All magazines
    •