@azonenberg@ioc.exchange
@azonenberg@ioc.exchange avatar

azonenberg

@azonenberg@ioc.exchange

Security and open source at the hardware/software interface. Embedded sec @ IOActive. Lead dev of ngscopeclient/libscopehal. GHz probe designer. Open source networking hardware. "So others may live"

Toots searchable on tootfinder.

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soatok, to random
@soatok@furry.engineer avatar

It’s Time for Furries to Stop Using Telegram

I have been a begrudging user of Telegram for years simply because that's what all the other furries use. When I signed up, I held my nose and expressed my discontent at Telegram by selecting a username that's a dig at MTProto's inherent insecurity against chosen ciphertext attacks: IND_CCA3_Insecure. Art: CMYKat I wrote about Furries and Telegram before, and included some basic privacy recommendations.

http://soatok.blog/2024/05/14/its-time-for-furries-to-stop-using-telegram/

azonenberg,
@azonenberg@ioc.exchange avatar

@gearlicious @soatok @GrapheneOS The last time I had to engage with a community that only existed on Telegram I ran the PC version in a virtual machine.

gsuberland, to random
@gsuberland@chaos.social avatar

always a good sign when you call an oscilloscope manufacturer to sanity-check a product choice, then explain your problem space and when you mention LPDDR3 they say "what's that?"

azonenberg,
@azonenberg@ioc.exchange avatar
azonenberg,
@azonenberg@ioc.exchange avatar

@gsuberland I couldn't imagine getting that kind of response from any vendor I work with.

Maybe from a dealer, but not the company itself.

Of course, if I was calling a scope vendor I worked with routinely at this point, I'd know exactly who I was asking the question to (e.g. Honam or Felix at LeCroy applications engineering). If you don't have as much of a relationship and familiarity with the company it can be harder to get to the person who actually can answer your question.

azonenberg, to random
@azonenberg@ioc.exchange avatar

Optics nerds: What's the easiest, lowest cost way to build something that focuses a lot of light from a fairly wide (say 90 degree, give or take a bit) FOV into a spectrometer with a SMA 905 fiber input?

Goal is to collect UV-VIS-NIR spectra of the night sky (particularly interested in both light pollution and auroras) over as much of the 200-1200nm range as I can get with low-cost optics (i.e. I don't want to spend extra to get a bit further outside visible, but will take what I can get easily).

Since the device will be operated outside at night, it can be open frame (no need for any exterior light-shield tube, only mechanical support components).

My initial thought is some kind of 80/20 based frame holding a cheap Fresnel lens at one end, with the spectrometer mounted at the focal point (no fiber, directly bolted to a bracket at the focal point) with a cosine corrector on the input to increase the size of the entrance pupil and provide a bit of tolerance for misalignments.

azonenberg,
@azonenberg@ioc.exchange avatar

PMMA looks like a pretty good choice for large, cheap, relatively broadband optics.

It's got a fairly flat ~90% transmission for a few-mm sheet (good enough, I can make up for the loss by increasing objective diameter) from around 370-1100nm then falls off sharply into the UV and has a small dip in the IR before rising again.

So it'll cover the vast majority of my spectrometer's capacity from mid UV-A into NIR, just losing the UV-B/C on the far short end of my wavelength range (which the atmosphere doesn't transmit all that well anyway).

azonenberg,
@azonenberg@ioc.exchange avatar

@RichiH No, just wanted to collect some data when they do occur.

As well as quantifying light pollution levels in various locations.

azonenberg,
@azonenberg@ioc.exchange avatar

@RichiH This system isn't something you'd want to use for alerting because the large objective diameter would collect way too much light, possibly to the point of damaging the spectrometer, during daylight.

And it won't be weatherproofed at all.

azonenberg,
@azonenberg@ioc.exchange avatar

@RichiH It's intended to be kept indoors and taken out only on clear, dark nights.

azonenberg,
@azonenberg@ioc.exchange avatar

@xaseiresh That's why the plan was to put a cosine corrector on the fiber input and focus the light from the sky down onto the surface of the corrector, giving me a nice parallel input to the spectrometer.

azonenberg,
@azonenberg@ioc.exchange avatar

@xaseiresh I want the spectrum of a large area. The cosine corrector has a PTFE diffuser in it, so my thought was that if I were to focus the image of the entire night sky down onto this ~4mm disk, I'd have fairly uniform representation of the whole sky at the other end of the fiber with all spatial information discarded.

azonenberg,
@azonenberg@ioc.exchange avatar

@xaseiresh (or at least, the fraction of the night sky within the FOV of the objective lens)

azonenberg, to random
@azonenberg@ioc.exchange avatar

TIL the "sense" pins in pcie power connectors are used for presence detect (so the card knows if it's powered by a 6 pin, 8 pin, or neither). Not remote sense for voltage drop compensation.

Guess my FPGA boards aren't actually PCIe power compatible after all.

gabrielesvelto, to random
@gabrielesvelto@fosstodon.org avatar

I love our users: I went over two bugs, one in Thunderbird where the user was trying to drag 5k contacts to the "To" field of a new email and the other in Firefox with the user trying to upload 100k files in one go to GDrive.

While these are extreme cases they should work. If we can handle them gracefully we can handle anything, so we should strive to make these cases work.

azonenberg,
@azonenberg@ioc.exchange avatar

@gabrielesvelto I would not want to be on the receiving end of an email chain with 5K "to" users. Even if only 0.1% of people reply-all there will be a massive flood of messages, lol.

By all means fix the bug, but please try to convince said user to use BCC :)

azonenberg,
@azonenberg@ioc.exchange avatar

@gabrielesvelto I would argue there is no line, and the distinction is purely one of malicious vs innocent intent.

azonenberg,
@azonenberg@ioc.exchange avatar

@Hovedorganet With BCC, they don't see your email (so if they reply-all the other 4999 people don't get it).

lofty, to random

Seems like my goal at work is to add a bunch of metrics to nextpnr.

So, is there any information people would like to have available?

azonenberg,
@azonenberg@ioc.exchange avatar

@lofty I'm not actively using it myself, but based on my experience with other tools, it would be nice to be able to get heatmaps of both BEL and routing usage so you can see where hot spots in the layout are.

Unless it has that capability already?

azonenberg,
@azonenberg@ioc.exchange avatar

@lofty Realistically though, I don't see myself using any of the open toolchains until there's good SERDES and multi-clock-domain support.

Last time I looked into this, none of that was supported properly.

mntmn, to random
@mntmn@mastodon.social avatar

ominous comment in one of my kicad documents

azonenberg,
@azonenberg@ioc.exchange avatar

@mntmn oh dear is this an A20 reference?

azonenberg, to random
@azonenberg@ioc.exchange avatar

How did I just find out today that C++ supports digit separators in integer literals since C++ '14?

azonenberg,
@azonenberg@ioc.exchange avatar

@thezoq2 Yeah I wish they used _ which is what SystemVerilog uses. ' is a bit strange.

azonenberg, to random
@azonenberg@ioc.exchange avatar

Anybody else ever look at a distributed-memory architecture diagram and start humming "Dragostea Din Tei" to yourself?

azonenberg,
@azonenberg@ioc.exchange avatar

@taral I'm looking at other MCU platforms and you'd be surprised how hard it is to find a general purpose, memory mapped, off-chip interconnect that you can disable all caching and prefetching etc on.

azonenberg,
@azonenberg@ioc.exchange avatar

@taral Yeah exactly.

Where can I find a Cortex-M MCU with a peripheral that's basically an AXI endpoint (ideally configurable in both host and device modes) bridged to say 1 Gbps 8b10b coded LVDS, or LVCMOS quad SPI? As in, no caching/prefetch (or at least it can be disabled), intended for SFR access rather than XIP off of flash.

Lana, to random
@Lana@beige.party avatar

What Your Piano Says About You: A Thread

1/🧵

You don't play the piano and you don't know anyone who does. What you do have is money. Lots of it. You are either a doctor or a lawyer by profession. The piano is likely placed in a prominent location in your expansive house, such as tucked under the stairs, where the sound can be muffled, or next to a bay window, where it can echo weirdly off the glass. The lid of your grand piano is always closed. There are photographs of you and your wife and kids arranged tastefully on the top and a soft accent lamp on the left hand side of the music desk which absolutely will not illuminate any part of the music adequately.

azonenberg,
@azonenberg@ioc.exchange avatar

@http_error_418 @Lana Just because you play a really nice one on stage doesn't mean they pay you well enough to have one at home.

If musicians are anything like visual artists the majority are probably quite broke.

azonenberg,
@azonenberg@ioc.exchange avatar

@http_error_418 @Lana Exactly, so it'd probably look like absolute garbage full of dings and scratches because they bought it at a garage sale or something, but the innards are in mint shape.

At least, my mom is a (now semi retired) piano teacher and that's what hers is like. Sounds awesome, looks like it was found in a dumpster. Nicks and scratches in the wood, some paint chipping off parts of the black keys, but regularly maintained by a very good tuner and the guts are as good as the day it left the factory.

azonenberg, to random
@azonenberg@ioc.exchange avatar

New thread on my big ongoing embedded project since the other one was getting too big.

To recap, this is a pilot project for a bunch of my future open hardware T&M and networking projects, validating a common platform that a lot of the future stuff is going to run on.

The primary problem it's trying to address is that I have a lot of instrumentation with trigger in/out ports, sometimes at different voltage levels, and I don't always have the same instrument sourcing the trigger every time.

So rather than moving around cables all the time and adding splitters, attenuators, amplifiers, etc. to the trigger signals I decided to make a dedicated device using an old XC7K70T-2FBG484 I had lying around.

Of course, as with any project, there was feature creep.

I'm standardizing on +48V DC for powering all of my future projects as it's high enough to move a lot of power but low enough to be mostly safe to work around live. So I needed to design and validate an intermediate bus converter to bring the 48 down to something like 12 for the rest of the system to use.

The FPGA has four 10G transceiver pairs on it. I used one for 10GbE (not that I need the bandwidth, but I was low on RJ45 ports on this bench and had some free SFP drops) and the rest are hooked up to front panel SMA ports (awaiting cables to go from PCB to panel) to generate PRBSes for instrument deskew.

Since I'm pinning out the transceivers and am planning to build a BERT eventually, I added BERT functionality to the firmware as well (still need to finish a few things but it's mostly usable now).

And since I have transceivers and access to all of the scope triggers, it would be dumb not to build a CDR trigger mode as well. That's in progress.

azonenberg,
@azonenberg@ioc.exchange avatar

And that was easy.

Started looking at the crypto accelerator code only to find a whole bunch of unnecessary CDC synchronizers, because I'm running the crypto engine and the management logic in the same clock domain now.

So I guess I should remove that first...

azonenberg,
@azonenberg@ioc.exchange avatar

And after fixing some bugs in the QSPI-APB bridge (>2 byte burst transactions on the QSPI were not correctly incrementing the address when translating to consecutive APB transfers), I have the curve25519 accelerator accessible over APB.

There's still some refactoring needed to tidy up the code (I want to do hierarchical APB with multiple levels of decode so I don't have to pass multiple bus segments across hierarchical boundaries, and move some CDCs across module boundaries to reduce duplication in the RTL, etc).

At this point the only registers left on the legacy bus are the IRQ status register, the 10GbE link status register, the SERDES DRPs, and the Ethernet TX/RX FIFOs.

Still another couple evenings probably to finish refactoring all of this to run over APB, then I can start testing direct memory mapping of the registers rather than the indirect access I'm using now.

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