Weekend project to design a @Raspberry_Pi 5 Hat featuring a AMD/Xilinx Artix 50T FPGA. Programmed by the Pi over SPI and featuring a PCIe Gen2 x1. Should allow for some interesting experiments.
Design will be open source once tested. Assembly is planned via @jlcpcb - it needs a bit of tidyup before I press the button. The board is 4-layer for a bit of a cost optimised assembly.
Asus Hyper M.2 x16 Gen5 Card: Adapterkarte für vier flotte NVMe-SSDs
Wer viele schnelle SSDs einsetzen möchte, kann demnächst die erste PCIe-5.0-Adapterkarte für vier SSDs kaufen. Theoretisch sind so etwa 63 GByte/s möglich.
I debated buying a new Mac due to its limited options for expandability. This all changed when I found a way to not only rackmount my mac, but add PCIe express slots to add additional components like NVMe SSDs, video capture cards, dual 10 gig networking, and even testing a video card.
I thought buying a USB nvme case to move a #Linux installation from an old m.2 sata to a new m.2 nvme disk was a good idea but that gave me USB errors after a few minutes. Apparently the 20€ usb adapter is trash.
Will do the copy 5x slower over 1Gbps ethernet now 🤷
@moreentropy yeah, that could depend on the adaptor manufacturer as #M2 drives also support USB 3.0 and most adaptors don't actually convert #SATA or #PCIe to #USB at all...
@sassageflare
My point is that entire racks full of interconnected cages full of storage, accelerators, NICs, etc. is quite common in #HPC, and #SGI basically made HPC solutions for CAD & VFX...
@golem :blobcatgooglynotlikethis: PCIe 7.0 is 4 times faster than PCIe 5.0...
The only reason why it needs to be that fast, are actually nvme's...
How about creating a dedicated bus or still having multiple lanes for older versions, i acutally would prefer having more PCIe lanes and they also dont need to be faster than PCIe 4
@whitekiba@Jain@golem I've yet to see it's connector cuz nowhere was I able to find it...
With PCIe 4.0 that was sadly omnitted from the spec.
And yes there are valid reasons for it:
Like industrial #SBC-based systems which may even utilize passive #PCIe#backplanes that do #Bifurcation per #Chipset, omnitting the need for expensive PCIe #switches.
Kinda like the passive PCIe x16 => 4x NVMe (PCIe x4) cards.