pixel, to retrocomputing
@pixel@social.pixels.pizza avatar
jfmezei, to random
@jfmezei@mstdn.ca avatar

@HoffmanLabs I've worked on IBM assembler but never really on vax and always with integers.
If code says (float) C = (int) A / (float) B, then at sone point before division, A gets converted to float, right?
Do CPUs have assembler instructions to convert from int to float and back? or does compiler generate code to set the 64 bits of a float with sign, exponent and mantissa based on value of integer, after which floating point instructions can treat those 64 bits as a float?

HoffmanLabs,

@jfmezei Usually, yes. But like most things in IT, details can vary.

VAX has a wad of CVT conversion instructions, among other wads of instructions including the vector extensions, for instance. VAX offers instructions for pretty much everything to everything (everything circa 1978) and either has an instruction, or maybe has a macro.

For VAX floating point details, see section 9.9 here:

https://docs.vmssoftware.com/docs/VAX_MACRO_INSTRUCTION_SET_REF.pdf#page236

Details here will vary by architecture, and often by implementation within architecture. (q.v. Alpha extensions including the byte-word extension, and Arm SBSA, etc.)

Here’s an Alpha intro, as Alpha was effectively VAX with most of the latent VAX limits removed (not the least of which were the condition codes):

https://www.cs.cmu.edu/afs/cs/academic/class/15213-f98/doc/alpha-guide.pdf

Alpha too has a wad of CVT conversion instructions.

The wrinkle with C code can be the implicit conversions that can (necessarily) arise when mixing data types. I’m not entirely certain a compound if {} else {} and a ?: ternary will produce the same outcome for all possible variations, and I’ve been using C for... for a while.

<voice=buzzlightyear>And UB, UB everywhere.

C looks kinda like a weird PDP-11 in various ways.

If you want to view the instructions of recent architectures, visit godbolt.

https://godbolt.org

#c

redork, to rainbow
@redork@vivaldi.net avatar

The ’s RX50 floppy drive makes managing disk images a challenge. But has all the tools you need to get organized. https://renaissancedork.com/managing-disk-images-for-the-rainbow/

HoffmanLabs, to history

Random DEC and Maynard History:

Atari had a video game Major Havoc, where a clone battled the evil Vaxxian empire located on Planet Maynard.

Entirely coincidentally, the headquarters of the producer of VAX supermini computers, Digital Equipment, was located in Maynard Massachusetts.

The pub located across Main Street from DEC’s Maynard Mill headquarters had a Major Havoc game for a while, too.

DEC used an addressing system that identified each site, building, floor, and pillar and mailstop within each DEC complex worldwide. Within the many buildings located in the Maynard Mill, the aforementioned pub self-allocated the next highest available building number for themselves, “becoming” (IIRC) MLO25; building 25.

Of course, various meetings were then held in building 25.

An image of mine showing a quiet evening in Maynard is included below.

https://web.archive.org/web/20200129064604/https://web.maynard.ma.us/history/mill-history.htm

https://collection.maynardhistory.org/items/show/7291

HoffmanLabs, to ascii

There are myriad different ASCII charts available on the ‘net, this one was from DEC.

#digitalequipmentcorporation #VT220 #ASCII #history #History

redork, to rainbow
@redork@vivaldi.net avatar

Maintaining and using a computer like the is an informative and fun bit of . But hard drives don’t age well and mine was becoming flaky. I owe a big thanks to David Gesswein for his MFM emulator project. Projects like his make sure that is accessible for years to come.

https://renaissancedork.com/replacing-the-rainbows-mfm-hard-drive/

HoffmanLabs, to VintageOSes

An Ars Technica write-up on the legacy of Digital Equipment Corporation:

https://arstechnica.com/gadgets/2023/10/long-gone-dec-is-still-powering-the-world-of-computing/

I have quibbles about some of the details.

HoffmanLabs,

@tommythorn @jfmezei DEC did do some semi-cheaper semi-SOC-ish Alpha processors; the DECchip 21066 and 21068 LCA45 and LCA4s designs.

DEC was interested in Arm for embedded projects, for I/O controllers, for handheld devices akin to the Compaq iPaq, and to help keep the fabs filled.

Several of the embedded projects in my acquaintance used 80186 (what doesn’t?) and having a corporate Arm option and tooling would have been nice. Doing the multi-port RAM memory refresh for the I/O controller’s 80186 bootstrap from within a VAX device driver was amusing, though.

Arm, and the 80186 and giblets, were all cheaper than the VAX processors that some of the DEC networking gear used as embedded processors.

Like the VAX microprocessors, the
Alpha fully-amortized production costs were high, so it made sense to have a lower-spec’d and cheaper processor designs available.

pixel, to VintageOSes
@pixel@social.pixels.pizza avatar
itnewsbot, to tech
@itnewsbot@schleuss.online avatar

Long gone, DEC is still powering the world of computing - Enlarge / A DEC VAX 8350 with cover removed. (credit: Adamantios)

... - https://arstechnica.com/?p=1967053

regehr, to random
@regehr@mastodon.social avatar

gonna try to trigger a few people here:

"Short reasons for long vectors in HPC CPUs: a study based on RISC-V"

https://arxiv.org/pdf/2309.06865.pdf

HoffmanLabs,

@pervognsen @steve @cr1901 @regehr The VAX/VMS kernel and a fair amount of VMS userland were written in VAX BLISS, and in VAX MACRO-32 assembler.

That implementation shifted with work to allow C in the VMS (later OpenVMS) kernel, and the remaining portions of BLISS and MACRO-32 in the current kernel are now far much smaller.

VSI still maintains BLISS and MACRO-32 compilers for OpenVMS on Alpha, Itanium, and x86-64.

HoffmanLabs, to history

A little fragment of Digital Equipment Corporation storage development that ended up at IBM by way of Quantum, now with 50 TB drives, and with the LTO tape drives that descended from the DEC TK50 DLT digital linear tape…

https://blocksandfiles.com/2023/08/23/50tb-ibm-tape/

dosnostalgic, to random
@dosnostalgic@mastodon.social avatar

I miss the days when a brand new OS would just let you reboot into a legacy OS. Happy 28th birthday to Windows 95! 🎉🎂🎈🍾🥂

HoffmanLabs,

@dosnostalgic VAX/VMS circa 1978 used to boot with PDP-11 RSX-11M compatibility mode available and a fair chunk of the apps in the early VAX/VMS versions were RSX-11M apps running in compatibility mode.

The VAX-11 boxes supported PDP-11 instructions in hardware.

You could run your existing PDP-11 RSX-11M apps directly, too.

That all ended at VAX/VMS V4.0 (~1984), and with then-new VAX models after VAX 8600.

VAX 8600 was originally to be named VAX-11/790, but marketing marketed and dropped the -11 with the “architecture for the ‘80s”.

PDP-11 RSX-11M compatibility mode became a separate product, and the PDP-11 instructions were emulated, and the -11 was dropped from VAX.

Technically, an LSI-11 console processor booted RT-11 from the 8” console floppy which then booted the VAX-11/780 (organizationally within he hardware, the VAX was an enormous LSI-11 peripheral) which ran VAX and PDP-11 instructions and which could run simh emulator to emulate PDP-11 running RT-11. If the LSI-11 failed—as happened on a couple of occasions—the VAX could continue to run. Just not reboot.

The approach Apple used for migrations with Rosetta and Rosetta 2 was far smoother.

Yeah. Fun times. When it all worked.

There are shenanigans in newer boxes too, but they’re usually somewhat better hidden.

HoffmanLabs, to random

VMS Software (VSI) has a Python qualification tool available for determining hardware compatibility of OpenVMS x86-64 on your local Intel or AMD server:
https://vmssoftware.com/openkits/alpopensource/vmscheck.zip

Example run:

OpenVMS 9.x compatibility quick-check

Summary:
Your CPU appears to be compatible with OpenVMS 9.2 and up.

Detailed info:

Vendor ID : GenuineIntel
CPU name : Intel(R) Core(TM) i5-7500 CPU @ 3.40GHz

Necessary for OpenVMS 9.x:
Intel or AMD CPU : Yes
SSE 4.1 : Yes
XSAVE : Yes
TSC : Yes
APIC : Yes
MTRR : Yes

Optional for OpenVMS 9.x:
PCID : Yes
X2APIC : Yes
FSGSBASE : Yes
MD_CLEAR : Yes
XSAVEOPT : Yes

And to think, Alpha EV7z peaked at 1.3 GHz, and a top-binned Itanium Poulson, err, Kittson peaked at 2.66 GHz, and here an old and slow i5 is now well past both at 3.4 GHz. (Yes, I am well aware of the perils of comparing clock speeds across disparate architectures, but thanks for mentioning that.)

lauren, to random
@lauren@mastodon.laurenweinstein.org avatar

Many years ago, I watched the relatively rapid disintegration of Digital Equipment Corporation (DEC), an important and massive firm that I admired greatly -- that even ran a private helicopter between its Mass/NH facilities (I rode it several times, it had its own gate at Logan!). Back then, it seemed impossible, unimaginable that they'd become just a memory due to technical and business decisions that proved to be out of step with the time in various ways.

I seriously and fervently hope that doesn't end up the same way.

HoffmanLabs,

@lauren Worked for DEC in the Maynard Mill for a while, and then in Nashua, and then through the acquisitions.

DEC was a fun ride, into the early 1990s.

Lots of cool tech. Alpha, networking, clustering, DECtalk and DECvoice, etc.

But the markets DEC was selling into either shifted or entirely faded away, and DEC didn’t adapt.

Lower-cost product fabrication was difficult or unobtainable with the longstanding production approaches DEC used, too. Commoditization and consolidation hit hard, both hardware and software.

(The fully-amortized cost of production for various DEC chips was prodigious. Competitive semiconductor chip production is not cheap.)

That the core of Microsoft Windows NT was DEC MICA undoubtedly stung some in DEC management.

http://www.bitsavers.org/pdf/dec/prism/mica/

DEC sales channels had their own messes. Direct sales versus channel partners versus sales reps is not an easy balance to create and maintain.

There were other issues.

Pushing OSI when IP had won, for instance.

DEC had great people creating innovative products. But markets can and will shift.

Should Google implode, IT will continue on.

HoffmanLabs,

@jfmezei @lauren The epoxy in the BA11 backplane of the MicroVAX II/RC (variously translated as reduced cost, reduced configuration, or really crappy) was one of various attempts to sell lower-end hardware configurations at lower prices.

That also all meant DEC had to restrict replacement BA11 backplane availability.

Another example of artificial segmentation was the deliberately-slowed firmware in the VAX 8500. Somebody found that loading VAX 8700 firmware into the VAX 8500 made the slower VAX run faster; run at VAX 8700 speeds.

Which then led to the addition of firmware checks, and to the VAX 8530 and VAX 8550 servers.

For a while, it was cheaper to buy a DEC VT240 and the color monitor upgrade than to buy the VT241 configuration, too. Same hardware, spare monochrome monitor, and cheaper.

Underneath all this and various other examples was the difficulty of building cheaper boxes without undercutting the profits from the higher-end boxes.

VAX wasn’t getting faster or cheaper, RISC got faster than VAX, PRISM never happened, Alpha was seriously fast but also late and wasn’t hitting volume even with Windows, DECstation four-digit (MIPS boxes) wasn’t all that popular, and the VAXmate and DECpc and DECstation three-digit (x86 boxes) were not things DEC was able to build cheaply enough.

DEC was better at building lower-volume and higher end and not-commodity boxes, couldn’t get product positioning and pricing and volumes right for commodity, and customers weren’t all that happy with (overt) product segmentation efforts.

If a vendor is not actively undercutting their own products with newer products and newer work, somebody else is. And the incumbent vendor won’t usually be able to catch up, once they realize they’re in competitive trouble. DEC got undercut in technical computing (with RISC), and then undercut in commercial.

And x86 then undercut all of the CISC and RISC vendors of that era.

The markets DEC were selling into shifted.

DEC didn’t.

HoffmanLabs,

@lauren @jfmezei The VAX-11/780 had a console clock speed command.

I’d have to rummage for the VAX console syntax, but it was a SET CLOCK (IIRC) selection for the clock speed akin to very stable (slow), stable (normal), and maybe-unstable (fast).

Newer hardware debug comands tend to be less obvious, and less exposed. And less necessary.

HoffmanLabs, to random

Set your wayback machine for the 1980s…

Before the web and HTML became ubiquitous, there were videotext terminals and similar software packages around, and probably most famously including the French Minitel system.

https://en.wikipedia.org/wiki/Minitel

Here are some folks seeking to recreate the Minitel:

https://fr.ulule.com/minimit/

The DEC VTX videotext layered product for then VAX/VMS and MicroVMS (later OpenVMS) was inspired by Minitel.

While VTX wasn’t often purchased by DEC customers, nor used all that widely outside of DEC, there was a whole lot inside DEC using VTX and the Notes conferencing app inside DEC. VTX was replaced by other mechanisms, while Notes was deprecated but never died.

There are some accessible Notes conferences (free) at the DECUServe server, for those interested in experiencing that. I’m not aware of any sites still running DEC VTX.

https://eisner.decuserve.org

HoffmanLabs, to random

DEC Alpha is an exceedingly asynchronous design, with memory reads and writes reordered or coalesced for performance.

This approach also arises with traps and exceptions, too. (With locks too, and EV6 exposed a bug in the DEC compiler code generation, but that’s fodder for another time.)

With floating point instructions, Alpha will trap on floating point errors, but not immediately. Some number of subsequent instructions will have been performed, and the inputs into the error and outputs from the error can have been overwritten. This is called the trap shadow. And there can be other traps arising in the same shadow; between the same execption barriers, or between the same trap barriers.

This means the code can get to rewind and restart the whole instruction sequence from the last barrier, in what amounts to synchronous operations. Or pass the whole problem to the caller, of course.

This asynchronous behavior works great for floating point finite operations with finite results, and not so well for code with underflows or overflows. If the FP gets wonky, the app or the system necessarily gets involved.

The compiler can generate barriers as needed or as requested, and with the obvious trade-off: the fewer the barriers inserted into the instruction stream, the faster the code execution, and the slower the error recovery.

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