If you are using clang-format in any of your projects, this might be useful to apply complex .clang-format rules as you type rather than after-the-fact.
This is huge. I’ve been bullish on RISC-V from the beginning but this is happening even faster than I expected. Between IT Sovereignty and geopolitics involving access to global supply chains, hyperspecialization of algorithms to hw, etc., it’s about to get really interesting.*
We’re one generation from the tech hacking culture of cyberpunk fiction.
HW heterogeneity will be mediated by LLVM and WebAssembly.
revng is a static binary translator. Given a input ELF binary for one of the supported architectures (currently i386, x86-64, MIPS, ARM, AArch64 and s390x) it will analyze it and emit an equivalent LLVM IR. To do so, revng employs the QEMU intermediate representation (a series of TCG instructions) and then translates them to #LLVM IR.
I just finished building #LLVM + #Clang on my #RISCV dev board! The entire process, from cloning the repo to building, linking, and installing, was all done natively on RISC-V!!
It took about 19 hours of work and 16 hours of having the puny quad-core in-order RISC-V CPU pinned at 100%, but the thing actually built successfully and is compiling and running programs. Insanely impressive stuff.
I have half an hour trip to climbing gym and back 3 times a week. Not to waste this time I take my laptop with downloaded materials with me and watch courses.
A nice side effect of the new state machine synthesis is that I can now generate nice graphs of the state machines.
Let's look at the blink example from before:
while (1) {
__output_led(0);
for (uint64_t it = 0; it < CLOCK_FREQ; it++)
clock();
__output_led(1);
for (uint64_t it = 0; it < CLOCK_FREQ; it++)
clock();
}
So I started building a high level synthesis tool that compiles LLVM IR to verilog...
It allows you to precisely control timing behavior by inserting clock() statements in your code. Here is a simple blink example:
while (1) {
__output_led(0);
for (uint64_t it = 0; it < CLOCK_FREQ; it++)
clock();
__output_led(1);
for (uint64_t it = 0; it < CLOCK_FREQ; it++)
clock();
}
The tool now automatically generates a state machine for this code.