#China is building an open national chip plan around #RiscV
Chinese RISC-V Alliance was established in 2018 to build out a full open-source chip ecosystem by 2030.
Long-term goal is to create a platform with full chip development platform with open-source chip designs, electronic design automation, and verification tools.
Chinese institutions are currently developing open-source EDA tools to design RISC-V chips.
Testing out this tiny little guy currently—RISC-V in a cute little cyberdeck package. What do you want to know about it? I'll work on a video soon! #riscv#cyberdeck#laptop (Disclosure: This laptop was provided for review by Sipeed)
Republicans in US congress pushing to prohibit work on some #OpenHardware / #OpenSource projects like #RISCV to try to keep / give USA an edge over China.
Also remember: Lots of US companies seems to include standard clauses in their contacts that forces their clients to follows US export laws. So this is not only a US problem, it’s a problem for everyone who rely on US companies.
I'm contemplating getting a #RISCV board for use at home. I ruled out the enterprise systems that are several thousand USD/EUR, as I plan to only use it for hobby capacity. Is there anything that is there to avoid? I recently learned that the SiFive boards have somewhat terrible memory performance, making them painfully slow for real world use. Any advice?
A fully soldered board, three dozen wires later, worked from the first launch.
Not very surprising - I’m usually precise and methodical :) But I won’t show the other side, it’s very difficult to neatly solder all these wires. #diy#ch32v003#riscv#electronics
The binary that we have built is self-hosting and can build itself, though perhaps a few more bugfixes will be needed to reach the newest version of tcc.
Donald #Trump weighs in on the #RISCV debate:
"Communist China, they're in your every device. Every camera you see, there is a Chinese communist in there folks, and they're not afraid, no they are not, they are not afraid of what they see. They see a big country like America becoming weak again -- exactly according to their plan, the Chinese plan to make America little again. They call this plan RISK VEE, and while its a risk for America, its no risk for the communist Chinese. Not at all.
Believe me, the unhinged democrats who cheated you out of an election think you're stupid enough to take the RISKKK -- its in all caps folks, and they expect our country to bow down and pronounce the skkk, just like the Chinese do -- they think you're dumb enough to not comprehend their perverse joke and passively take the RISKKKK. Whats the RISKKKK? It means spending billions and billions of dollars to replace the greatest computers ever created with this little chinese trojan horse, sacrificing all of America's great power in the world. They say its a little computer, a computer with a whole lots less instructions than the Intel machines that America created that currently run the world, including #Truth Social, the most American app ever made. Our computers have so many instructions people, huge instructions, its what makes America great. And lets not beat around the bush: even if there are less instructions, you'll be following more of them, on toy computers created by the CCP, you'll follow their every instruction, instructions that tell men to become women and boys to become girls. You'll forget about Americas great instructions, and be following China's little instructions, without even having to understand Chinese. Their instructions are little enough that you wont even notice, thats the Chinese way. I won't have it folks, we're going to make these little computers illegal again!/s"
#RISCV "Wait for Interrupt instruction (WFI) provides a hint to the implementation that the current hart can be stalled until an interrupt ... so a legal implementation is to simply implement WFI as a NOP" 🤔
Bit of frustration tonight making VisionFive 2 builds of #HaikuOS . Mine kept hanging at MMCBusDriver. Thankfully X512 ‘s January build (just dumped with dd on the NVMe) boots fine. Mouse isn’t working though so I can just look at it I guess 😅
cannot figure out if -mcmodel=medany makes #riscv fully position independent (ie i can load it anywhere in physical memory and it'll still work) or if i need something more
After kicking this hornets' nest of Linux users in general and RISC-V in particular this week, it occurred to me that I hadn't touched my RISC-V board in months, and things have probably improved in the meantime.
So, I fired up my VisionFive 2 again, and this time finally got it to boot off of an NVMe drive instead of micro SD.
Even with the SSD, it's still pretty pokey, but in an Ubuntu-on-Raspberry-Pi-circa-2020 kind of way (i.e., more or less usable).
i still cant work out what i wanna do with my #OSDev project. i feel like i should try and figure out QEmu so that my efforts are the most "real", but that thing feels like such a black hole in terms of documentation
on the other hand building my own #riscv VM seems easy and i wouldn't have to use QEmu, because implementing RV32I opcodes is easy, but then you get into the status and control registers and now things are all super complicated again